The invention is in the field of transistor amplifier circuits, and relates more particularly to a power amplifier circuit having a bias boosting circuit for improving amplifier linearity and reducing idle current.
Amplifiers of this general type are frequently used in high-frequency RF amplifiers, as well as in audio amplifiers and other applications. In order to obtain a linear input-output relationship and high operating efficiency, such amplifiers are typically operated with a conduction angle of about 180xc2x0 (Class B) or slightly greater (Class AB) to avoid crossover distortion.
Typically, amplifiers of this type require a dc bias circuit to establish the quiescent bias current in the amplifier circuit to ensure operation in the Class B or Class AB mode. In the prior art, bias is typically provided by a fixed current source, as shown in U.S. Pat. No. 5,844,443, or else by an external supply, which can be set to a desired constant value to secure the quiescent current necessary to operate in the desired mode, as shown in U.S. Pat. No. 5,548,248.
However, in amplifiers of the type described above the average current drawn from the supply depends upon the input signal level. As the output power increases so does the average current in both the emitter and the base of the power transistor. This increased average current causes an increased voltage drop in the biasing circuitry and in ballast resistors (which are used to avoid hot-spotting and thermal runaway in transistors using an interdigitated design). This in turn reduces the conduction angle (i.e. the number of degrees out of 360xc2x0 that the amplifier is conducting), and forces the amplifier deep into Class B or even Class C operation, thereby reducing the maximum power output by about 25%. To avoid this power reduction, the amplifier must have a larger quiescent bias. In prior-art circuitry this inevitably leads to a higher power dissipation at low power output levels and therefore an undesirable tradeoff in operating characteristics.
The present inventors have in the past developed various techniques involving improved bias circuits and bias boosting techniques, but these either do not have a signal input from the amplifier circuit, or else have a dc coupled signal input, which has operational disadvantages and design limitations on both the bias circuit and the stage to which it is coupled.
Accordingly, it would be desirable to have a power amplifier circuit which offers the advantages of optimum maximum output power and reduced power dissipation at low power levels, along with improved amplifier linearity and reduced idle current.
It is therefore an object of the present invention to provide a power amplifier circuit which provides improved maximum output power and less power dissipation at low power levels, along with improved amplifier linearity and reduced idle current.
In accordance with the invention, these objects are achieved by a new power amplifier circuit for amplifying an input signal and having a conduction angle of at least about 180xc2x0, the amplifier circuit including an amplifying transistor and a dc bias circuit for biasing the amplifier transistor to obtain the desired conduction angle. The dc bias circuit includes a dynamic bias boosting circuit for increasing the dc bias current provided to the amplifying transistor by the dc bias circuit in direct proportion to an increase in the input signal provided to the power amplifier, and the input of the dc bias circuit is coupled to a stage of the power amplifier circuit by a capacitor.
In a preferred embodiment of the invention, the amplifier circuit is either a Class B or a Class AB amplifier circuit.
In a further preferred embodiment of the invention, the power amplifier circuit also includes a driver stage having a driver transistor, and the capacitor mentioned above is directly connected to the output terminal of the driver transistor.
A power amplifier circuit in accordance with the present invention offers a significant improvement in that a particularly advantageous combination of features, including increased maximum output power and reduced power dissipation at low power levels can be obtained along with improved amplifier linearity and reduced idle current in a simple, compact and economical configuration.
These and other aspects of the invention will be apparent from and elucidated with reference to the embodiments described hereinafter.